Impact of Crystallization Method on Poly-Si Tunnel FETs

Yi Hsuan Chen, William Cheng Yu Ma, Jer Yi Lin, Chun Yen Lin, Po Yang Hsu, Chi Yuan Huang, Tien-Sheng Chao

研究成果: Article同行評審

13 引文 斯高帕斯(Scopus)

摘要

In this letter, the impact of crystallization method on the electrical characteristics of polycrystalline silicon (poly-Si) tunnel field-effect transistors (TFETs) is investigated. Different crystallization methods may result in different amounts of interface traps (Nit) and bulk traps (NGB). TFETs crystallized with solid-phase crystallization (SPC) and metal-induced lateral crystallization (MILC) were fabricated and compared. In comparison with the SPC TFETs, the MILC TFETs exhibit ∼ 4.5× higher ON-state current ION, subthreshold swing reduction ΔS.S. ∼ 202 mV/decade, and larger ∼ 7.2× ON/OFF current ratio. According to the measurement of a monitor poly-Si thin-film transistor, replacing SPC with MILC results in a reduced Nit ∼ 0.60× and a reduced NGB ∼ 0.36×, respectively. It can enhance the gate-to-tunnel junction controllability. Consequently, lowering trap density favors reducing power consumption of TFETs and provides a promising solution for future low-power driving circuits in portable electronics.

原文English
文章編號7194770
頁(從 - 到)1060-1062
頁數3
期刊IEEE Electron Device Letters
36
發行號10
DOIs
出版狀態Published - 1 10月 2015

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