In this paper, we proposed a new algorithm based on Montgomery's algorithm to calculate modular multiplication that is the core arithmetic operation in RSA cryptosystem. Since the critical path delay in modular multiplication operation is reduced, the new design yields a very fast implementation. We have implemented a 512-bit single chip RSA processor based on our modified algorithm with Compass 0.6μm SPDM cell library. By our modified modular exponentiation algorithm, it takes about 1.5n2 clock cycles to finish one n-bit RSA modular exponentiation operation in our architecture. The simulation results show that we can operate up to 125Mhz, therefore the baud rate of our 512-bit RSA processor is about 164k bits/sec.
|出版狀態||Published - 1 十二月 1996|
|事件||Proceedings of the 1996 IEEE Asia Pacific Conference on Circuits and Systems - Seoul, South Korea|
持續時間: 18 十一月 1996 → 21 十一月 1996
|Conference||Proceedings of the 1996 IEEE Asia Pacific Conference on Circuits and Systems|
|城市||Seoul, South Korea|
|期間||18/11/96 → 21/11/96|