HYBRID TFET-MOSFET CIRCUIT DESIGN

Chuang, C.-T., & Su, P. (2016). HYBRID TFET-MOSFET CIRCUIT DESIGN. (專利號 US 9,412,439 B1).

Chuang, Ching-Te (Inventor) ; Su, Pin (Inventor). / HYBRID TFET-MOSFET CIRCUIT DESIGN. 專利號: US 9,412,439 B1. 8月 09, 2016.

@misc{f2f22fccb11c49d7a9c107cf7d015998,

title = "HYBRID TFET-MOSFET CIRCUIT DESIGN",

author = "Ching-Te Chuang and Pin Su",

year = "2016",

month = aug,

day = "9",

language = "English",

type = "Patent",

note = "US 9,412,439 B1",

}

Chuang, C-T & Su, P 8月. 09 2016, HYBRID TFET-MOSFET CIRCUIT DESIGN, 專利號 US 9,412,439 B1.

HYBRID TFET-MOSFET CIRCUIT DESIGN. / Chuang, Ching-Te (Inventor); Su, Pin (Inventor).
專利號: US 9,412,439 B1. 8月 09, 2016.

研究成果: Patent

TY - PAT

T1 - HYBRID TFET-MOSFET CIRCUIT DESIGN

AU - Chuang, Ching-Te

AU - Su, Pin

PY - 2016/8/9

Y1 - 2016/8/9

M3 - Patent

M1 - US 9,412,439 B1

ER -

Chuang CT, Su P, 發明者. HYBRID TFET-MOSFET CIRCUIT DESIGN. US 9,412,439 B1. 2016 8月 9.

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