Hot-carrier induced degradation of critical paths modeled by rule-based analysis

Scott B. Kuusinen*, Chen-Ming Hu

*此作品的通信作者

研究成果: Conference article同行評審

1 引文 斯高帕斯(Scopus)

摘要

An implementation of simple hot carrier rules is presented with the intent of providing insight into reliability problems as early in the design process as possible. To that end, these rules have been incorporated into BERT, a circuit reliability simulator, using a timing simulator as the simulation engine. This allows for quick estimation of problem points in the critical path of large circuits. Furthermore, by exploiting the inverting property of CMOS circuitry, it is possible to remove some of the estimation problems that can arise from false paths. By separating analysis into rising and falling waveforms, and partitioning the circuit into channel connected components, it is possible to prevent analysts of clearly impossible paths.

原文English
頁(從 - 到)69-72
頁數4
期刊Proceedings of the Custom Integrated Circuits Conference
DOIs
出版狀態Published - 1 一月 1995
事件Proceedings of the 1995 17th Annual Custom Integrated Circuits Conference - Santa Clara, CA, USA
持續時間: 1 五月 19954 五月 1995

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