Highly reliable MA BE-SONOS (Metal-Al2O3 Bandgap Engineered SONOS) using a SiO2 buffer layer

Sheng Chih Lai; Hang Ting Lue; Chien Wei Liao; Tai Bor Wu; Ming Jui Yang; Yi Hsien Lue; Jung Yu Hsieh; Szu Yu Wang; Guang Li Luo; Chao-Hsin Chien; Kuang Yeu Hsieh; Rich Liu; Chih Yuan Lu

doi:10.1109/VTSA.2008.4530797

Highly reliable MA BE-SONOS (Metal-Al₂O₃ Bandgap Engineered SONOS) using a SiO₂ buffer layer

Sheng Chih Lai^*, Hang Ting Lue, Chien Wei Liao, Tai Bor Wu, Ming Jui Yang, Yi Hsien Lue, Jung Yu Hsieh, Szu Yu Wang, Guang Li Luo, Chao-Hsin Chien, Kuang Yeu Hsieh, Rich Liu, Chih Yuan Lu

^*此作品的通信作者

研究成果: Conference contribution › 同行評審

2 引文斯高帕斯（Scopus）

摘要

A Metal-high-K Bandgap-Engineered SONOS (MA BE-SONOS) with an additional SiO₂ buffer layer is proposed. The thin SiO₂ (5-6 nm) layer between the high-K (Al₂O₃) and nitride serves to prevent shallow trap generation. Contrary to the previously proposed MANOS or MA BE-SONOS devices using a simple high-k top dielectric, this composite structure eliminates the unstable high-K/nitride interface. Experimental results show that this new device can well suppress the erase saturation, just like MANOS. On the other hand, the data retention is greatly improved, owing to the much more stable interface between the nitride-trapping layer and top oxide. Very large memory window (> 7V) with excellent cycling endurance, read disturb immunity, and data retention has been successfully demonstrated. Theoretical model is also proposed to explain the principle of this device.

原文	English
主出版物標題	2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA
頁面	58-59
頁數	2
DOIs	https://doi.org/10.1109/VTSA.2008.4530797
出版狀態	Published - 14 8月 2008
事件	2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Hsinchu, 台灣持續時間: 21 4月 2008 → 23 4月 2008

出版系列

名字	International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Conference

Conference	2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA
國家/地區	台灣
城市	Hsinchu
期間	21/04/08 → 23/04/08

存取文件

10.1109/VTSA.2008.4530797

其它文件與鏈接

Link to publication in Scopus

引用此

Lai, S. C., Lue, H. T., Liao, C. W., Wu, T. B., Yang, M. J., Lue, Y. H., Hsieh, J. Y., Wang, S. Y., Luo, G. L., Chien, C.-H., Hsieh, K. Y., Liu, R., & Lu, C. Y. (2008). Highly reliable MA BE-SONOS (Metal-Al₂O₃ Bandgap Engineered SONOS) using a SiO₂ buffer layer. 於 2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA (頁 58-59). 文章 4530797 (International Symposium on VLSI Technology, Systems, and Applications, Proceedings). https://doi.org/10.1109/VTSA.2008.4530797

@inproceedings{7911c1d008ae4c228eb9b73cbf30b76a,

title = "Highly reliable MA BE-SONOS (Metal-Al2O3 Bandgap Engineered SONOS) using a SiO2 buffer layer",

abstract = "A Metal-high-K Bandgap-Engineered SONOS (MA BE-SONOS) with an additional SiO2 buffer layer is proposed. The thin SiO2 (5-6 nm) layer between the high-K (Al2O3) and nitride serves to prevent shallow trap generation. Contrary to the previously proposed MANOS or MA BE-SONOS devices using a simple high-k top dielectric, this composite structure eliminates the unstable high-K/nitride interface. Experimental results show that this new device can well suppress the erase saturation, just like MANOS. On the other hand, the data retention is greatly improved, owing to the much more stable interface between the nitride-trapping layer and top oxide. Very large memory window (> 7V) with excellent cycling endurance, read disturb immunity, and data retention has been successfully demonstrated. Theoretical model is also proposed to explain the principle of this device.",

author = "Lai, {Sheng Chih} and Lue, {Hang Ting} and Liao, {Chien Wei} and Wu, {Tai Bor} and Yang, {Ming Jui} and Lue, {Yi Hsien} and Hsieh, {Jung Yu} and Wang, {Szu Yu} and Luo, {Guang Li} and Chao-Hsin Chien and Hsieh, {Kuang Yeu} and Rich Liu and Lu, {Chih Yuan}",

year = "2008",

month = aug,

day = "14",

doi = "10.1109/VTSA.2008.4530797",

language = "English",

isbn = "9781424416158",

series = "International Symposium on VLSI Technology, Systems, and Applications, Proceedings",

pages = "58--59",

booktitle = "2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA",

note = "2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA ; Conference date: 21-04-2008 Through 23-04-2008",

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Lai, SC, Lue, HT, Liao, CW, Wu, TB, Yang, MJ, Lue, YH, Hsieh, JY, Wang, SY, Luo, GL, Chien, C-H, Hsieh, KY, Liu, R & Lu, CY 2008, Highly reliable MA BE-SONOS (Metal-Al₂O₃ Bandgap Engineered SONOS) using a SiO₂ buffer layer. 於 2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA., 4530797, International Symposium on VLSI Technology, Systems, and Applications, Proceedings, 頁 58-59, 2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA, Hsinchu, 台灣, 21/04/08. https://doi.org/10.1109/VTSA.2008.4530797

Highly reliable MA BE-SONOS (Metal-Al₂O₃ Bandgap Engineered SONOS) using a SiO₂ buffer layer. / Lai, Sheng Chih; Lue, Hang Ting; Liao, Chien Wei 等.
2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA. 2008. p. 58-59 4530797 (International Symposium on VLSI Technology, Systems, and Applications, Proceedings).

研究成果: Conference contribution › 同行評審

TY - GEN

T1 - Highly reliable MA BE-SONOS (Metal-Al2O3 Bandgap Engineered SONOS) using a SiO2 buffer layer

AU - Lai, Sheng Chih

AU - Lue, Hang Ting

AU - Liao, Chien Wei

AU - Wu, Tai Bor

AU - Yang, Ming Jui

AU - Lue, Yi Hsien

AU - Hsieh, Jung Yu

AU - Wang, Szu Yu

AU - Luo, Guang Li

AU - Chien, Chao-Hsin

AU - Hsieh, Kuang Yeu

AU - Liu, Rich

AU - Lu, Chih Yuan

PY - 2008/8/14

Y1 - 2008/8/14

N2 - A Metal-high-K Bandgap-Engineered SONOS (MA BE-SONOS) with an additional SiO2 buffer layer is proposed. The thin SiO2 (5-6 nm) layer between the high-K (Al2O3) and nitride serves to prevent shallow trap generation. Contrary to the previously proposed MANOS or MA BE-SONOS devices using a simple high-k top dielectric, this composite structure eliminates the unstable high-K/nitride interface. Experimental results show that this new device can well suppress the erase saturation, just like MANOS. On the other hand, the data retention is greatly improved, owing to the much more stable interface between the nitride-trapping layer and top oxide. Very large memory window (> 7V) with excellent cycling endurance, read disturb immunity, and data retention has been successfully demonstrated. Theoretical model is also proposed to explain the principle of this device.

AB - A Metal-high-K Bandgap-Engineered SONOS (MA BE-SONOS) with an additional SiO2 buffer layer is proposed. The thin SiO2 (5-6 nm) layer between the high-K (Al2O3) and nitride serves to prevent shallow trap generation. Contrary to the previously proposed MANOS or MA BE-SONOS devices using a simple high-k top dielectric, this composite structure eliminates the unstable high-K/nitride interface. Experimental results show that this new device can well suppress the erase saturation, just like MANOS. On the other hand, the data retention is greatly improved, owing to the much more stable interface between the nitride-trapping layer and top oxide. Very large memory window (> 7V) with excellent cycling endurance, read disturb immunity, and data retention has been successfully demonstrated. Theoretical model is also proposed to explain the principle of this device.

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U2 - 10.1109/VTSA.2008.4530797

DO - 10.1109/VTSA.2008.4530797

M3 - Conference contribution

AN - SCOPUS:49049109829

SN - 9781424416158

T3 - International Symposium on VLSI Technology, Systems, and Applications, Proceedings

SP - 58

EP - 59

BT - 2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA

T2 - 2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA

Y2 - 21 April 2008 through 23 April 2008

ER -

Lai SC, Lue HT, Liao CW, Wu TB, Yang MJ, Lue YH 等. Highly reliable MA BE-SONOS (Metal-Al₂O₃ Bandgap Engineered SONOS) using a SiO₂ buffer layer. 於 2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA. 2008. p. 58-59. 4530797. (International Symposium on VLSI Technology, Systems, and Applications, Proceedings). doi: 10.1109/VTSA.2008.4530797