Highly reliable a-Si:H gate driver on array with complementary double-sided noise-eliminating and dual voltage levels for TFT-LCD applications

Guang Ting Zheng, Po Tsun Liu*, Jo Lin Chen, Cheng Hao Li

*此作品的通信作者

研究成果: Article同行評審

2 引文 斯高帕斯(Scopus)

摘要

In this work, we present a high-reliability gate driver on array (GOA) for a 10.7-in. HD (1,280 × RGB × 720) TFT-LCD panel, featuring an alternatively double-sided noise-eliminating function. The gate driver circuit is designed with 12-phase clock signals that exhibit 75% signal overlapping, threshold voltage recovering, and double-sided driving schemes. The double-sided driving scheme reduces the number of mental wires and TFTs in the gate driver circuit, resulting in a smaller layout area for GOA. By utilizing dual levels of voltage, we implemented a negative gate bias method to mitigate threshold voltage shifts for the noise-eliminating and driving TFTs. This prevents the noises from clock signals effectively. The reliability test of the proposed GOA with 720 stages passed a strict testing condition (90°C and −40°C) for simulation and exhibited good performance over 800 hours at 90°C for measurement.

原文English
頁(從 - 到)638-650
頁數13
期刊Journal of the Society for Information Display
31
發行號11
DOIs
出版狀態Published - 11月 2023

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