TY - GEN
T1 - High voltage lateral 4H-SiC JFETs on a semi-insulating substrate
AU - Huang, Chih Fang
AU - Kan, Cheng Li
AU - Wu, Tian-Li
AU - Lee, Meng Chia
AU - Liu, Yo Zthu
AU - Lee, Kung Yen
AU - Zhao, Feng
PY - 2009/12/11
Y1 - 2009/12/11
N2 - Because of the superior material properties, silicon carbide (SiC) devices have drawn considerable attention in high power and high temperature applications. Promising performance has been demonstrated on both vertical and lateral devices [1] - [3]. In this paper, we report the performance of high voltage lateral 4H-SiC JFETs built on a semi-insulating substrate. The drift region design is based on charge compensation of the n-and p-type materials. The best achieved breakdown voltage is 3510 V, which is the highest value ever published for SiC lateral switching devices. Ron, sp is 390 mΩ-cm2, resulting in a BV2/Ron, sp of 32 MW/cm2.
AB - Because of the superior material properties, silicon carbide (SiC) devices have drawn considerable attention in high power and high temperature applications. Promising performance has been demonstrated on both vertical and lateral devices [1] - [3]. In this paper, we report the performance of high voltage lateral 4H-SiC JFETs built on a semi-insulating substrate. The drift region design is based on charge compensation of the n-and p-type materials. The best achieved breakdown voltage is 3510 V, which is the highest value ever published for SiC lateral switching devices. Ron, sp is 390 mΩ-cm2, resulting in a BV2/Ron, sp of 32 MW/cm2.
UR - http://www.scopus.com/inward/record.url?scp=76549092465&partnerID=8YFLogxK
U2 - 10.1109/DRC.2009.5354929
DO - 10.1109/DRC.2009.5354929
M3 - Conference contribution
AN - SCOPUS:76549092465
SN - 9781424435289
T3 - Device Research Conference - Conference Digest, DRC
SP - 275
EP - 276
BT - 67th Device Research Conference, DRC 2009
T2 - 67th Device Research Conference, DRC 2009
Y2 - 22 June 2009 through 24 June 2009
ER -