High voltage gain 4H-SIC CMOS technology featuring LOCal oxidation of SiC (LOCOSiC) isolation and balanced gate dielectric
Bing Yue Tsui*, Chia Lung Hung, Ya Ru Jhuang, Yi Ting Huang, Jung Chien Cheng, Fang Hsin Lu, Yi Ting Shih, Ya Hsin Lee, Liang Yu Chen, Fu Hsiang Chuang, Pei Wen Li
*此作品的通信作者
研究成果: Conference contribution › 同行評審
2
引文
斯高帕斯(Scopus)