High voltage gain 4H-SIC CMOS technology featuring LOCal oxidation of SiC (LOCOSiC) isolation and balanced gate dielectric

Bing Yue Tsui*, Chia Lung Hung, Ya Ru Jhuang, Yi Ting Huang, Jung Chien Cheng, Fang Hsin Lu, Yi Ting Shih, Ya Hsin Lee, Liang Yu Chen, Fu Hsiang Chuang, Pei Wen Li

*此作品的通信作者

研究成果: Conference contribution同行評審

1 引文 斯高帕斯(Scopus)

指紋

深入研究「High voltage gain 4H-SIC CMOS technology featuring LOCal oxidation of SiC (LOCOSiC) isolation and balanced gate dielectric」主題。共同形成了獨特的指紋。

Engineering

Physics

Keyphrases