High-Voltage Amorphous InGaZnO TFT with Al2O3 High-k Dielectric for Low-Temperature Monolithic 3-D Integration

Ming Jiue Yu, Ruei Ping Lin, Yu Hong Chang, Tuo-Hung Hou*

*此作品的通信作者

研究成果: Article同行評審

25 引文 斯高帕斯(Scopus)

摘要

On-chip high-voltage (HV) power management integrated circuits would deliver smaller form factor, lower system cost, higher power efficiency, and suppressed noise in system-on-chip designs. A reliable HV amorphous-indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) technology has been presented for potential applications of monolithic 3-D integration on CMOS. By using a process temperature below 200 °C, the instability of positive- and negative-bias stresses can be carefully minimized. The HV a-IGZO TFT with an Al2O3 high-k gate dielectric possesses a high breakdown voltage exceeding 45 V, a high saturation mobility of 11.3 cm2/Vs, and a large ON-/OFF-current ratio of 109. The long-term reliability study projects that the device can be operated at 20 V for ten years without catastrophic dielectric breakdown while maintaining sufficient ON-current.

原文English
文章編號7547290
頁(從 - 到)3944-3949
頁數6
期刊IEEE Transactions on Electron Devices
63
發行號10
DOIs
出版狀態Published - 1 10月 2016

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