The authors report a gate array based on heterojunction bipolar transistors (HBTs) and using ECL/CML (emitter-coupled-logic/current-mode-logic) circuits. The transistors employed have ft values up to 43 GHz. Frequency dividers based on gate-array macrocells have shown flip-flop toggle rates up to 7.0 GHz. A device technology and circuit approach targeted at ultrahigh speeds are used. The HBTs used are based on AlGaAs/GaAs epilayer structures grown by molecular beam epitaxy on semi-insulating GaAs substrates. The gate array has been personalized to produce a 4/8-bit data multiplexer, a 4/8-bit data demultiplexer, a seven-stage variable-modulus divider, and a phase detector. Operation up to a maximum frequency of 7.0 GHz was observed; the corresponding gate delay of the bilevel CML gates in the divider is 71 ps with an average fanout of 2.5.
|頁（從 - 到）||186-187, 336|
|期刊||Digest of Technical Papers - IEEE International Solid-State Circuits Conference|
|出版狀態||Published - 1 12月 1989|
|事件||IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC 1989) - New York, NY, USA|
持續時間: 15 2月 1989 → 17 2月 1989