TY - GEN
T1 - High Speed Energy Efficient Optical Receiver
AU - Lee, Yuan Sheng
AU - Chen, Wei-Zen
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2018/10/9
Y1 - 2018/10/9
N2 - This paper describes the design techniques of high speed, energy efficient optical receivers, covering from the front-end amplifier to the post clock and data recovery circuit (CDR). An integration type optical receiver incorporating with a current boost preamplifier and a baud rate CDR is proposed to improve the receiver sensitivity as well as its energy efficiency. A fully integrated experimental prototype is implemented in a TSMC 40 nm CMOS technology that achieves a high energy efficiency of 2.1 pJ/bit at 25 Gbps operation.
AB - This paper describes the design techniques of high speed, energy efficient optical receivers, covering from the front-end amplifier to the post clock and data recovery circuit (CDR). An integration type optical receiver incorporating with a current boost preamplifier and a baud rate CDR is proposed to improve the receiver sensitivity as well as its energy efficiency. A fully integrated experimental prototype is implemented in a TSMC 40 nm CMOS technology that achieves a high energy efficiency of 2.1 pJ/bit at 25 Gbps operation.
KW - Baud Rate Clock and Data Recovery Circuit
KW - Equalizer
KW - Optical Receiver
KW - Transimpedance Amplifier
UR - http://www.scopus.com/inward/record.url?scp=85056303689&partnerID=8YFLogxK
U2 - 10.1109/EDSSC.2018.8487122
DO - 10.1109/EDSSC.2018.8487122
M3 - Conference contribution
AN - SCOPUS:85056303689
T3 - 2018 IEEE International Conference on Electron Devices and Solid State Circuits, EDSSC 2018
BT - 2018 IEEE International Conference on Electron Devices and Solid State Circuits, EDSSC 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2018 IEEE International Conference on Electron Devices and Solid State Circuits, EDSSC 2018
Y2 - 6 June 2018 through 8 June 2018
ER -
