High performance In0.53Ga0.47As FinFETs fabricated on 300 mm Si substrate

M. L. Huang; S. W. Chang; M. K. Chen; Y. Oniki; H. C. Chen; C. H. Lin; W. C. Lee; Chun-Hsiung Lin; M. A. Khaderbad; K. Y. Lee; Z. C. Chen; P. Y. Tsai; L. T. Lin; M. H. Tsai; C. L. Hung; T. C. Huang; Y. C. Lin; Y. C. Yeo; S. M. Jang; H. Y. Hwang; Howard C.H. Wang; Carlos H. Diaz

doi:10.1109/VLSIT.2016.7573361

High performance In_0.53Ga_0.47As FinFETs fabricated on 300 mm Si substrate

M. L. Huang, S. W. Chang, M. K. Chen, Y. Oniki, H. C. Chen, C. H. Lin, W. C. Lee, Chun-Hsiung Lin, M. A. Khaderbad, K. Y. Lee, Z. C. Chen, P. Y. Tsai, L. T. Lin, M. H. Tsai, C. L. Hung, T. C. Huang, Y. C. Lin, Y. C. Yeo, S. M. Jang, H. Y. HwangHoward C.H. Wang, Carlos H. Diaz

國際半導體產業學院

研究成果: Conference contribution › 同行評審

29 引文斯高帕斯（Scopus）

摘要

In_0.53Ga_0.47As FinFETs are fabricated on 300 mm Si substrate. High device performance with good uniformity across the wafer are demonstrated (SS=78 mV/dec., I_on/I_off∼10⁵, DIBL=48 mV/V, g_m=1510 μS/μm, and I_on=301 μA/μm at V_ds=0.5V with L_g=120 nm device). The extrinsic field effect mobility of 1731 cm²/V-s with EOT∼0.9nm is extracted by split-CV. Devices fabricated on 300mm Si have shown similar performances in SS and I_on when benchmarked with device fabricated on lattice-matched InP substrate. In addition, an I_on of 44.1 μA per fin is observed on the fin-height of 70 nm and the fin-width of 25nm, which is among the highest values reported for In_0.53Ga_0.47As FinFETs to the best of our knowledge.

原文	English
主出版物標題	2016 IEEE Symposium on VLSI Technology, VLSI Technology 2016
發行者	Institute of Electrical and Electronics Engineers Inc.
ISBN（電子）	9781509006373
DOIs	https://doi.org/10.1109/VLSIT.2016.7573361
出版狀態	Published - 21 9月 2016
事件	36th IEEE Symposium on VLSI Technology, VLSI Technology 2016 - Honolulu, 美國持續時間: 13 6月 2016 → 16 6月 2016

出版系列

名字	Digest of Technical Papers - Symposium on VLSI Technology
卷	2016-September
ISSN（列印）	0743-1562

Conference

Conference	36th IEEE Symposium on VLSI Technology, VLSI Technology 2016
國家/地區	美國
城市	Honolulu
期間	13/06/16 → 16/06/16

存取文件

10.1109/VLSIT.2016.7573361

其它文件與鏈接

Link to publication in Scopus

引用此

Huang, M. L., Chang, S. W., Chen, M. K., Oniki, Y., Chen, H. C., Lin, C. H., Lee, W. C., Lin, C.-H., Khaderbad, M. A., Lee, K. Y., Chen, Z. C., Tsai, P. Y., Lin, L. T., Tsai, M. H., Hung, C. L., Huang, T. C., Lin, Y. C., Yeo, Y. C., Jang, S. M., ... Diaz, C. H. (2016). High performance In_0.53Ga_0.47As FinFETs fabricated on 300 mm Si substrate. 於 2016 IEEE Symposium on VLSI Technology, VLSI Technology 2016 文章 7573361 (Digest of Technical Papers - Symposium on VLSI Technology; 卷 2016-September). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSIT.2016.7573361

@inproceedings{e80a2e0a46204ff6823b00de4c0ba05e,

title = "High performance In0.53Ga0.47As FinFETs fabricated on 300 mm Si substrate",

abstract = "In0.53Ga0.47As FinFETs are fabricated on 300 mm Si substrate. High device performance with good uniformity across the wafer are demonstrated (SS=78 mV/dec., Ion/Ioff∼105, DIBL=48 mV/V, gm=1510 μS/μm, and Ion=301 μA/μm at Vds=0.5V with Lg=120 nm device). The extrinsic field effect mobility of 1731 cm2/V-s with EOT∼0.9nm is extracted by split-CV. Devices fabricated on 300mm Si have shown similar performances in SS and Ion when benchmarked with device fabricated on lattice-matched InP substrate. In addition, an Ion of 44.1 μA per fin is observed on the fin-height of 70 nm and the fin-width of 25nm, which is among the highest values reported for In0.53Ga0.47As FinFETs to the best of our knowledge.",

author = "Huang, {M. L.} and Chang, {S. W.} and Chen, {M. K.} and Y. Oniki and Chen, {H. C.} and Lin, {C. H.} and Lee, {W. C.} and Chun-Hsiung Lin and Khaderbad, {M. A.} and Lee, {K. Y.} and Chen, {Z. C.} and Tsai, {P. Y.} and Lin, {L. T.} and Tsai, {M. H.} and Hung, {C. L.} and Huang, {T. C.} and Lin, {Y. C.} and Yeo, {Y. C.} and Jang, {S. M.} and Hwang, {H. Y.} and Wang, {Howard C.H.} and Diaz, {Carlos H.}",

note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 36th IEEE Symposium on VLSI Technology, VLSI Technology 2016 ; Conference date: 13-06-2016 Through 16-06-2016",

year = "2016",

month = sep,

day = "21",

doi = "10.1109/VLSIT.2016.7573361",

language = "English",

series = "Digest of Technical Papers - Symposium on VLSI Technology",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2016 IEEE Symposium on VLSI Technology, VLSI Technology 2016",

address = "美國",

}

Huang, ML, Chang, SW, Chen, MK, Oniki, Y, Chen, HC, Lin, CH, Lee, WC, Lin, C-H, Khaderbad, MA, Lee, KY, Chen, ZC, Tsai, PY, Lin, LT, Tsai, MH, Hung, CL, Huang, TC, Lin, YC, Yeo, YC, Jang, SM, Hwang, HY, Wang, HCH & Diaz, CH 2016, High performance In_0.53Ga_0.47As FinFETs fabricated on 300 mm Si substrate. 於 2016 IEEE Symposium on VLSI Technology, VLSI Technology 2016., 7573361, Digest of Technical Papers - Symposium on VLSI Technology, 卷 2016-September, Institute of Electrical and Electronics Engineers Inc., 36th IEEE Symposium on VLSI Technology, VLSI Technology 2016, Honolulu, 美國, 13/06/16. https://doi.org/10.1109/VLSIT.2016.7573361

High performance In_0.53Ga_0.47As FinFETs fabricated on 300 mm Si substrate. / Huang, M. L.; Chang, S. W.; Chen, M. K. 等.
2016 IEEE Symposium on VLSI Technology, VLSI Technology 2016. Institute of Electrical and Electronics Engineers Inc., 2016. 7573361 (Digest of Technical Papers - Symposium on VLSI Technology; 卷 2016-September).

研究成果: Conference contribution › 同行評審

TY - GEN

T1 - High performance In0.53Ga0.47As FinFETs fabricated on 300 mm Si substrate

AU - Huang, M. L.

AU - Chang, S. W.

AU - Chen, M. K.

AU - Oniki, Y.

AU - Chen, H. C.

AU - Lin, C. H.

AU - Lee, W. C.

AU - Lin, Chun-Hsiung

AU - Khaderbad, M. A.

AU - Lee, K. Y.

AU - Chen, Z. C.

AU - Tsai, P. Y.

AU - Lin, L. T.

AU - Tsai, M. H.

AU - Hung, C. L.

AU - Huang, T. C.

AU - Lin, Y. C.

AU - Yeo, Y. C.

AU - Jang, S. M.

AU - Hwang, H. Y.

AU - Wang, Howard C.H.

AU - Diaz, Carlos H.

PY - 2016/9/21

Y1 - 2016/9/21

N2 - In0.53Ga0.47As FinFETs are fabricated on 300 mm Si substrate. High device performance with good uniformity across the wafer are demonstrated (SS=78 mV/dec., Ion/Ioff∼105, DIBL=48 mV/V, gm=1510 μS/μm, and Ion=301 μA/μm at Vds=0.5V with Lg=120 nm device). The extrinsic field effect mobility of 1731 cm2/V-s with EOT∼0.9nm is extracted by split-CV. Devices fabricated on 300mm Si have shown similar performances in SS and Ion when benchmarked with device fabricated on lattice-matched InP substrate. In addition, an Ion of 44.1 μA per fin is observed on the fin-height of 70 nm and the fin-width of 25nm, which is among the highest values reported for In0.53Ga0.47As FinFETs to the best of our knowledge.

AB - In0.53Ga0.47As FinFETs are fabricated on 300 mm Si substrate. High device performance with good uniformity across the wafer are demonstrated (SS=78 mV/dec., Ion/Ioff∼105, DIBL=48 mV/V, gm=1510 μS/μm, and Ion=301 μA/μm at Vds=0.5V with Lg=120 nm device). The extrinsic field effect mobility of 1731 cm2/V-s with EOT∼0.9nm is extracted by split-CV. Devices fabricated on 300mm Si have shown similar performances in SS and Ion when benchmarked with device fabricated on lattice-matched InP substrate. In addition, an Ion of 44.1 μA per fin is observed on the fin-height of 70 nm and the fin-width of 25nm, which is among the highest values reported for In0.53Ga0.47As FinFETs to the best of our knowledge.

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DO - 10.1109/VLSIT.2016.7573361

M3 - Conference contribution

AN - SCOPUS:84990961021

T3 - Digest of Technical Papers - Symposium on VLSI Technology

BT - 2016 IEEE Symposium on VLSI Technology, VLSI Technology 2016

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 36th IEEE Symposium on VLSI Technology, VLSI Technology 2016

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