High performance and high reliability polysilicon thin-film transistors with multiple nano-wire channels

Yung Chun Wu*, Chun Yen Chang, Ting Chang Chang, Po-Tsun Liu, Chi Shen Chen, Chun Hao Tu, Hsiao-Wen Zan, Ya-Hsiang Tai, Simon Min Sze

*此作品的通信作者

研究成果: Conference article同行評審

19 引文 斯高帕斯(Scopus)

摘要

We have investigated the lightly-doped drain (LDD) polysilicon thin-film transistors (poly-Si TFTs) with a series of multi-channel with different widths. The ten 67 nm-wide split channels TFT has best gate control due to its tri-gate structure, and has lowest poly-Si grain boundary defects, which were passivated by NH3 plasma effectively due to its split nano-wires structure. The proposed TFT exhibits high performance electrical characteristics, such as a high ON/OFF current ratio (>109), a steep subthreshold slope (SS) of 137 mV/decade, an absence of drain-induced barrier lowering (DIBL), suppressed kink-effect, and superior reliability.

原文English
文章編號1419289
頁(從 - 到)777-780
頁數4
期刊Technical Digest - International Electron Devices Meeting, IEDM
DOIs
出版狀態Published - 13 12月 2004
事件IEEE International Electron Devices Meeting, 2004 IEDM - San Francisco, CA, 美國
持續時間: 13 12月 200415 12月 2004

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