High-performance and damage-free neutral beam etching for advanced ULSI devices

Seiji Samukawa*

*此作品的通信作者

研究成果: Paper同行評審

摘要

A novel 50 nm-width MOS gate etching process was established using a newly developed neutral beam etching system by optimizing the gas chemistry and the electrode bias condition. In a comparison of poly-Si gate etching using either SF6 or Cl2 gas chemistries, opposite etching characteristics were observed in the pattern profile. Consequently, the use of a mixture of these gases was proposed in order to achieve fine control of the etching profiles. The energy of the neutral beam was increased by applying a 600 kHz RF bias to the bottom electrode. The RF bias was very effective in increasing the etch rate and the anisotropy of the poly-Si gates, with no deterioration of the neutralization efficiency. The oxide leakage current achieved for a MOS capacitor etched by the neutral beam was one order of magnitude lower than that achieved by conventional plasma etching.

原文English
頁面542-547
頁數6
出版狀態Published - 2004
事件2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004 - Beijing, China
持續時間: 18 10月 200421 10月 2004

Conference

Conference2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004
國家/地區China
城市Beijing
期間18/10/0421/10/04

指紋

深入研究「High-performance and damage-free neutral beam etching for advanced ULSI devices」主題。共同形成了獨特的指紋。

引用此