High-Accuracy and Low-latency Hybrid Stochastic Computing for Artificial Neural Network

Artificial Neural Networks (ANN) have shown their superiority in many applications of academia and industry. However, the hardware architecture of ANN requires a lot of operation units, which results in a high area and high-power overhead. On the other hand, the Stochastic Computing (SC) method has been proven as an efficient way to achieve low-power computing with a small area overhead. Therefore, many SC-based ANNs have been proposed in recent years. However, due to stochastic bit-stream computing, the conventional SC-based ANN designs suffer from low computing accuracy. In this work, we use the parallel counter (PC) to replace the SC-based multiply-Accumulator (MAC) to solve the accuracy problem in conventional SC-based ANN designs. Besides, we propose a finite state machine (FSM)-based activation function to improve the efficiency of the data representation change in SC-based ANN computing. Compared with the conventional SC-based ANN designs, our proposed architecture can improve computing accuracy by 82.2%. Besides, our proposed architecture can reduce 95.8% area cost and 94.2% power consumption over than non-SC-based ANN design, which achieves higher hardware efficiency.