摘要
In this paper, we have successfully fabricated low-temperature polycrystalline silicon thin-film transistor (LTPS-TFT) nonvolatile memory devices employing high-κEu2O3 and Y 2O3 films as the charge trapping layer. The LTPS-TFT memory device uses band-to-band tunneling-induced hot hole injection and gate Fowler-Nordheim injection as the program and erase methods, respectively. Compared with the Y2O3 film, the LTPS-TFT memory device using an Eu2O3 charge-trapping layer exhibited a lower subthreshold swing and a larger memory window, a smaller charge loss, and a better endurance performance, presumably because of the higher charge-trapping efficiency of the Eu2O3 film.
原文 | English |
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文章編號 | 6523940 |
頁(從 - 到) | 2251-2255 |
頁數 | 5 |
期刊 | IEEE Transactions on Electron Devices |
卷 | 60 |
發行號 | 7 |
DOIs | |
出版狀態 | Published - 15 7月 2013 |