TY - JOUR
T1 - Hierarchical techniques for symbolic analysis of large electronic circuits
AU - Jou, Shyh-Jye
AU - Perng, Mei Fang
AU - Su, Chau-Chin
AU - Wang, C. K.
PY - 1994
Y1 - 1994
N2 - A hierarchical symbolic analyzer(SAGA2) for the analysis of electronic circuits is presented. SAGA2 analyzes lumped, linear, or linearized (small-signal) circuits in the S- and Z-domain. For large circuits, a hierarchical two-port method is used that is two to three order faster than that without using the hierarchical method. Also, the memory used is dramatically reduced.
AB - A hierarchical symbolic analyzer(SAGA2) for the analysis of electronic circuits is presented. SAGA2 analyzes lumped, linear, or linearized (small-signal) circuits in the S- and Z-domain. For large circuits, a hierarchical two-port method is used that is two to three order faster than that without using the hierarchical method. Also, the memory used is dramatically reduced.
UR - http://www.scopus.com/inward/record.url?scp=0028554088&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.1994.408745
DO - 10.1109/ISCAS.1994.408745
M3 - Conference article
AN - SCOPUS:0028554088
SN - 0271-4310
VL - 1
SP - 21
EP - 24
JO - Proceedings - IEEE International Symposium on Circuits and Systems
JF - Proceedings - IEEE International Symposium on Circuits and Systems
T2 - Proceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6)
Y2 - 30 May 1994 through 2 June 1994
ER -