Hierarchical placement with layout constraints

Po-Hung Lin*, Yao Wen Chang

*此作品的通信作者

研究成果: Chapter同行評審

3 引文 斯高帕斯(Scopus)

摘要

In analog layout design, devices are required to be placed with matching, symmetry, and proximity constraints to reduce parasitic coupling effects and improve circuit performance. In addition to these basic placement constraints, there exist hierarchical symmetry and hierarchical proximity constraints due to circuit and layout design hierarchies. This chapter first introduces the hierarchical constraints induced by circuit and layout design hierarchies, and then presents a hierarchical placement approach to better consider these hierarchical constraints and effectively reduce the search space.

原文English
主出版物標題Analog Layout Synthesis
主出版物子標題A Survey of Topological Approaches
發行者Springer US
頁面61-94
頁數34
ISBN(列印)9781441969316
DOIs
出版狀態Published - 1 12月 2011

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