TY - GEN
T1 - HfZrO-Based Ferroelectric Devices for Lower Power AI and Memory Applications
AU - Takagi, Shinichi
AU - Toprasertpong, Kasidit
AU - Tahara, Kent
AU - Nako, Eishin
AU - Nakane, Ryosho
AU - Wang, Zeyu
AU - Luo, Xuan
AU - Lee, Tsung En
AU - Takenaka, Mitsuru
N1 - Publisher Copyright:
© 2021 ECS-The Electrochemical Society.
PY - 2021
Y1 - 2021
N2 - Si-friendly HfO 2-based ferroelectric devices have been strongly recognized as a novel technology booster for future integrated memory and logic systems. In this paper, we address our recent activities on TiN/Hf 0.5Zr 0.5O 2(HZO)/TiN MFM capacitors, HZO/Si FeFETs for memory applications and a newly-proposed reservoir computing using HZO/Si FeFETs and MFM capacitors for AI applications. We have demonstrated that MFM capacitors with HZO less than 5 nm can realize low crystallization temperature, excellent ferroelectricity, low operating voltage and high read/write endurance by performing sufficient wake-up operations to the thin HZO films. For the FeFET memory, we have found the importance of interfacial layers (ILs) between HZO and Si on the memory window. It has been revealed that the IL thickness is sensitive to the process temperature and that electron trapping around HZO/ILs has significant impacts on the memory operation. Finally, we have proposed and experimentally demonstrated reservoir computing using FeFETs for neuromorphic applications.
AB - Si-friendly HfO 2-based ferroelectric devices have been strongly recognized as a novel technology booster for future integrated memory and logic systems. In this paper, we address our recent activities on TiN/Hf 0.5Zr 0.5O 2(HZO)/TiN MFM capacitors, HZO/Si FeFETs for memory applications and a newly-proposed reservoir computing using HZO/Si FeFETs and MFM capacitors for AI applications. We have demonstrated that MFM capacitors with HZO less than 5 nm can realize low crystallization temperature, excellent ferroelectricity, low operating voltage and high read/write endurance by performing sufficient wake-up operations to the thin HZO films. For the FeFET memory, we have found the importance of interfacial layers (ILs) between HZO and Si on the memory window. It has been revealed that the IL thickness is sensitive to the process temperature and that electron trapping around HZO/ILs has significant impacts on the memory operation. Finally, we have proposed and experimentally demonstrated reservoir computing using FeFETs for neuromorphic applications.
UR - http://www.scopus.com/inward/record.url?scp=85116900406&partnerID=8YFLogxK
U2 - 10.1149/10404.0017ecst
DO - 10.1149/10404.0017ecst
M3 - Conference contribution
AN - SCOPUS:85116900406
T3 - ECS Transactions
SP - 17
EP - 26
BT - 240th ECS Meeting - Semiconductor Process Integration 12
PB - IOP Publishing Ltd.
T2 - 240th ECS Meeting
Y2 - 10 October 2021 through 14 October 2021
ER -