Artifact Subspace Reconstruction (ASR) is a machine learning technique widely used to remove non-brain signals (referred to as 'artifacts') from electroencephalograms (EEGs). The ASR algorithm can, however, be constrained by the limited memory available on portable devices. To address this challenge, we propose a Hardware-Oriented Memory-Limited Online ASR (HMO-ASR) algorithm. The proposed HMO-ASR algorithm consists of (1) two-level window-based preprocessing including PCA-based and z-score-based preprocessing to clean the data in each window, (2) iterative mean, standard deviation, and covariance update using a parallel algorithm to achieve window-based processing, and (3) early eigenvector matrix determination to save the computation. With the three schemes, the HMO-ASR method can be implemented on mobile devices, application-specific integrated circuits (ASICs) or field programmable gate arrays (FPGAs) with limited memory. The study results showed that the proposed HMO-ASR algorithm can achieve comparable performance to those obtained by the offline ASR algorithm with a 98.64% reduction in memory size. An FPGA implementation is used for silicon proof of the proposed HMO-ASR algorithm.
|頁（從 - 到）||3493-3497|
|期刊||IEEE Transactions on Circuits and Systems I: Regular Papers|
|出版狀態||Published - 1 12月 2021|