GRPlacer: Improving routability and wire-length of global routing with circuit replacement

Ke Ren Dai*, Chien Hung Lu, Yih-Lang Li

*此作品的通信作者

研究成果: Conference contribution同行評審

15 引文 斯高帕斯(Scopus)

摘要

Placement profoundly impacts physical design owing to its role in determining the lower bound of a circuit wirelength, as well as the circuit routability. To close the gap between placement and routing, this study integrates global routing and placement to improve the wirelength estimation accuracy of placement. Two methods, called wirelength-reduced cell shifting and cell rearrangement by bipartite matching, are applied to minimize wirelength. Cell sorting based congestion reduction and pattern-prerouting based congestion-avoided cell shifting are proposed to reduce congestion. Experimental results demonstrate that the proposed placer improves total routed wirelength by 2% to ROOSTER on IBMv2 benchmarks. Moreover, the proposed GRPlacer resolves the original congested regions of the placements generated by ROOSTER. Compare with the detailed placer in ROOSTER, our work can reduce more routed wire length and remove more overflows.

原文English
主出版物標題Proceedings of the 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers, ICCAD 2009
頁面351-356
頁數6
DOIs
出版狀態Published - 2009
事件2009 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2009 - San Jose, CA, 美國
持續時間: 2 11月 20095 11月 2009

出版系列

名字IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
ISSN(列印)1092-3152

Conference

Conference2009 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2009
國家/地區美國
城市San Jose, CA
期間2/11/095/11/09

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