Generalized theory and realization of a voltage-controlled negative resistance MOS device (lambda MOSFET)

A generalized theoretical approach used to predict circuits which exhibit the three-terminal negative resistance MOS characteristic is presented. The main structure of the positive feedback circuit is accomplished by connecting the drain and gate terminals of an n-channel enhancement mode MOSFET with the input and output terminals of an inverter circuit. The characteristic parameters such as the peak current, the peak voltage, the negative resistance, and the valley voltage are derived in a generalized form. Based on the theoretical predictions, several high density integrated circuits that give rise to a voltage-controlled negative resistance characteristic were fabricated and are described.