Gate Voltages Impacting on Latch-up Measurements

Shao Chang Huang, Jian Hsing Lee, Chun Chih Chen, Ching Ho Li, Chih Cherng Liao, Kai Chieh Hsu, Gong Kai Lin, Li Fan Chen, Chien Wei Wang, Chih Hsuan Lin, Yeh Ning Jou, Ke Horng Chen

研究成果: Conference contribution同行評審

摘要

Integrated Circuits (ICs) are often turned off under latch-up measurements. One power IC is often applied with a large size for driving capabilities. The large size device is often difficult to be turned off under latch-up stresses. In this paper, device behaviors of different gate biased voltages applied on large size devices under latch-up measurements are discussed. From the silicon data analyses, latch-up current paths changed from MOSFET to the parasitic diodes are observed well so the false latch-up test is verified. Finally, over voltage test is proposed for turned-on large size devices' latch-up measurements.

原文English
主出版物標題Proceedings - 2022 IEEE International Conference on Consumer Electronics - Taiwan, ICCE-Taiwan 2022
發行者Institute of Electrical and Electronics Engineers Inc.
頁面75-76
頁數2
ISBN(電子)9781665470506
DOIs
出版狀態Published - 2022
事件2022 IEEE International Conference on Consumer Electronics - Taiwan, ICCE-Taiwan 2022 - Taipei, Taiwan
持續時間: 6 7月 20228 7月 2022

出版系列

名字Proceedings - 2022 IEEE International Conference on Consumer Electronics - Taiwan, ICCE-Taiwan 2022

Conference

Conference2022 IEEE International Conference on Consumer Electronics - Taiwan, ICCE-Taiwan 2022
國家/地區Taiwan
城市Taipei
期間6/07/228/07/22

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