Gate-oxide reliability on CMOS analog amplifiers in a 130-nm low-voltage CMOS processes

Jung Sheng Chen*, Ming-Dou Ker

*此作品的通信作者

    研究成果: Conference contribution同行評審

    4 引文 斯高帕斯(Scopus)

    摘要

    The effect of gate-oxide reliability in MOSFET on common-source amplifiers is investigated with the non-stacked and stacked structures in a 130-nm low-voltage CMOS process. The supply voltage of 2.5 V is applied on the amplifiers to accelerate and observe the impact of gate-oxide reliability on circuit performances including small-signal gain, unity-gain frequency, and output DC voltage level under DC stress and AC stress with DC offset, respectively. The small-signal parameters of amplifier with non-stacked structure strongly degrade under such overstress conditions. The gate-oxide reliability in analog circuit can be improved by stacked structure for small-signal input and output applications.

    原文English
    主出版物標題Proceedings of 13th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2006
    頁面45-48
    頁數4
    DOIs
    出版狀態Published - 2006
    事件13th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2006 - Singapore, Singapore
    持續時間: 3 7月 20067 7月 2006

    出版系列

    名字Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA

    Conference

    Conference13th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2006
    國家/地區Singapore
    城市Singapore
    期間3/07/067/07/06

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