Gate-all-around floating-gate memory device with triangular poly-Si nanowire channels

Jung Ruey Tsai*, Ko Hui Lee, Horng-Chih Lin, Tiao Yuan Huang

*此作品的通信作者

研究成果: Article同行評審

3 引文 斯高帕斯(Scopus)

摘要

A novel gate-all-around (GAA) poly-Si floating-gate (FG) memory device with triangular nanowire (NW) channels was fabricated and characterized in this work. The enhanced electric field around the corners of the NW channels boosts more electrons tunneling through the tunnel oxide layer during programming and erasing (P/E) processes, and thus the operation voltage markedly decreases. Furthermore, the nonlocalized trapping feature characteristic of the FG makes the injection of electrons easier during the programming operation, which was demonstrated by technology computer-aided design (TCAD) simulations.

原文English
文章編號04ED14
期刊Japanese journal of applied physics
53
發行號4 SPEC. ISSUE
DOIs
出版狀態Published - 4月 2014

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