Forming-Free SiGeOx/TiOy Resistive Random Access Memories Featuring Large Current Distribution Windows

Chun-Hu Cheng; Albert Chin; Hsiao-Hsuan Hsu

doi:10.1166/jnn.2019.16781

Forming-Free SiGeOx/TiOy Resistive Random Access Memories Featuring Large Current Distribution Windows

Chun-Hu Cheng, Albert Chin, Hsiao-Hsuan Hsu^*

^*此作品的通信作者

電子研究所

研究成果: Article › 同行評審

摘要

Optimal device integrity was achieved in Ni/SiGeOx/TiOy/TaN resistive memory by using a formingfree switch with a low switching power of 790 mu W, stable endurance of 10(4) cycles, optimal retention time of 10(5) s, resistance window of at least 1150x, and tight current distributions at 85 degrees C. These characteristics are attributed to the low current switching obtained using SiGeOx with a high oxygen vacancy density and highly defective TiOy grain boundaries.

原文	English
頁（從 - 到）	7916-7919
頁數	4
期刊	Journal of Nanoscience and Nanotechnology
卷	19
發行號	12
DOIs	https://doi.org/10.1166/jnn.2019.16781
出版狀態	Published - 12月 2019

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10.1166/jnn.2019.16781

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title = "Forming-Free SiGeOx/TiOy Resistive Random Access Memories Featuring Large Current Distribution Windows",

abstract = "Optimal device integrity was achieved in Ni/SiGeOx/TiOy/TaN resistive memory by using a formingfree switch with a low switching power of 790 mu W, stable endurance of 10(4) cycles, optimal retention time of 10(5) s, resistance window of at least 1150x, and tight current distributions at 85 degrees C. These characteristics are attributed to the low current switching obtained using SiGeOx with a high oxygen vacancy density and highly defective TiOy grain boundaries.",

keywords = "Resistive Memory, SiGeOx, TiOy, Current Distribution, Switching Power, FLEXIBLE SUBSTRATE",

author = "Chun-Hu Cheng and Albert Chin and Hsiao-Hsuan Hsu",

year = "2019",

month = dec,

doi = "10.1166/jnn.2019.16781",

language = "English",

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AU - Cheng, Chun-Hu

AU - Chin, Albert

AU - Hsu, Hsiao-Hsuan

PY - 2019/12

Y1 - 2019/12

N2 - Optimal device integrity was achieved in Ni/SiGeOx/TiOy/TaN resistive memory by using a formingfree switch with a low switching power of 790 mu W, stable endurance of 10(4) cycles, optimal retention time of 10(5) s, resistance window of at least 1150x, and tight current distributions at 85 degrees C. These characteristics are attributed to the low current switching obtained using SiGeOx with a high oxygen vacancy density and highly defective TiOy grain boundaries.

AB - Optimal device integrity was achieved in Ni/SiGeOx/TiOy/TaN resistive memory by using a formingfree switch with a low switching power of 790 mu W, stable endurance of 10(4) cycles, optimal retention time of 10(5) s, resistance window of at least 1150x, and tight current distributions at 85 degrees C. These characteristics are attributed to the low current switching obtained using SiGeOx with a high oxygen vacancy density and highly defective TiOy grain boundaries.

KW - Resistive Memory

KW - SiGeOx

KW - TiOy

KW - Current Distribution

KW - Switching Power

KW - FLEXIBLE SUBSTRATE

U2 - 10.1166/jnn.2019.16781

DO - 10.1166/jnn.2019.16781

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JO - Journal of Nanoscience and Nanotechnology

JF - Journal of Nanoscience and Nanotechnology

IS - 12

ER -

Forming-Free SiGeOx/TiOy Resistive Random Access Memories Featuring Large Current Distribution Windows

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