Fluorinated HfO 2 gate dielectrics engineering for CMOS by pre-and post-CF 4 plasma passivation

Woei Cherng Wu, Chao Sung Lai*, Shih Ching Lee, Ma Ming-Wen, Tien-Sheng Chao, Jer Chyi Wang, Chih Wei Hsu, Pai Chi Chou, Jian Hao Chen, Kuo Hsing Kao, Wen Cheng Lo, Tsung Yi Lu, Li Lin Tay, Nelson Rowell

*此作品的通信作者

研究成果: Conference contribution同行評審

11 引文 斯高帕斯(Scopus)

摘要

In this paper, we demonstrate TaN/Fluorinated HfO 2 CMOS devices, focusing on symmetry and asymmetry fluorine incorporation at top or bottom HfO 2 interfaces. 16% permittivity enhancement, 65% and 91% mobility increases for electron and hole, respectively, under high electric field was achieved. Reliability of n- and p-MOSFET was improved 3 orders and 8% for GIDL and hot carrier immunity, respectively. A physical model of shallow and deep trapping level affected by fluorine was proposed to explain the NBTI and PBTI improvements.

原文English
主出版物標題2008 IEEE International Electron Devices Meeting, IEDM 2008
DOIs
出版狀態Published - 1 12月 2008
事件2008 IEEE International Electron Devices Meeting, IEDM 2008 - San Francisco, CA, United States
持續時間: 15 12月 200817 12月 2008

出版系列

名字Technical Digest - International Electron Devices Meeting, IEDM
ISSN(列印)0163-1918

Conference

Conference2008 IEEE International Electron Devices Meeting, IEDM 2008
國家/地區United States
城市San Francisco, CA
期間15/12/0817/12/08

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