First demonstration of heterogenous complementary FETs utilizing Low-Temperature (200 °c) Hetero-Layers Bonding Technique (LT-HBT)

T. Z. Hong, W. H. Chang, A. Agarwal, Y. T. Huang, C. Y. Yang, T. Y. Chu, H. Y. Chao, Y. Chuang, S. T. Chung, J. H. Lin, S. M. Luo, C. J. Tsai, M. J. Li, X. R. Yu, N. C. Lin, T. C. Cho, P. J. Sung, C. J. Su, G. L. Luo, F. K. HsuehK. L. Lin, H. Ishii, T. Irisawa, T. Maeda, C. T. Wu, W. C.Y. Ma, D. D. Lu, K. H. Kao, Y. J. Lee*, H. J.H. Chen, C. L. Lin, R. W. Chuang, K. P. Huang, S. Samukawa, Yi-Ming Li, Jenn-Hwan Tarng, Tien-Sheng Chao, M. Miura, G. W. Huang, W. F. Wu, J. Y. Li, J. M. Shieh, Y. H. Wang, W. K. Yeh

*此作品的通信作者

研究成果: Conference contribution同行評審

4 引文 斯高帕斯(Scopus)

摘要

For the first time, we demonstrate heterogeneous complementary FETs (hCFETs) with Ge and Si channels fabricated with a layer transfer technique. The 3D channel stacking integration particularly employs a low-temperature (200 °C) hetero-layers bonding technique (LT-HBT) realized by a surface activating chemical treatment at room temperature, enabling Ge channels bonded onto Si wafers. Furthermore, to obtain symmetric performance in n/p FETs, a multi-channel structure of two-channel Si and one-channel Ge is also implemented. Wafer-scale LT-HBT is demonstrated successfully, showing new opportunities for the ultimate device footprint scaling with heterogeneous integration.

原文English
主出版物標題2020 IEEE International Electron Devices Meeting, IEDM 2020
發行者Institute of Electrical and Electronics Engineers Inc.
頁面15.5.1-15.5.4
ISBN(電子)9781728188881
DOIs
出版狀態Published - 12 12月 2020
事件66th Annual IEEE International Electron Devices Meeting, IEDM 2020 - Virtual, San Francisco, United States
持續時間: 12 12月 202018 12月 2020

出版系列

名字Technical Digest - International Electron Devices Meeting, IEDM
2020-December
ISSN(列印)0163-1918

Conference

Conference66th Annual IEEE International Electron Devices Meeting, IEDM 2020
國家/地區United States
城市Virtual, San Francisco
期間12/12/2018/12/20

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