@inproceedings{0d571dcdb8da43b98a613d32f0712698,
title = "First Demonstration of GAA Monolayer-MoS2Nanosheet nFET with 410μA μ m ID 1V VD at 40nm gate length",
abstract = "This work demonstrates the first successful integration of monolayer MoS2 nanosheet FET in a gate-all-around configuration. At a gate length of 40nm, the transistor exhibits a remarkable mathrm{I}-{ mathrm{ON}} sim 410 mu mathrm{A}/ { mu} mathrm{m} at mathrm{V}-{ mathrm{DS}}=1 mathrm{V}, achieved with a monolayer channel, '0.7 nm thin. The FET has a large mathrm{I}-{ mathrm{ON}}/ mathrm{I}-{ mathrm{OFF}} gt 1 mathrm{E}8, positive mathrm{V}-{ mathrm{TH}} sim 1.4 mathrm{V} with nearly zero DIBL. Higher drive current can be achieved through stacking of multiple channel layers. We propose here a fully integrated flow and we detail the feasibility of the most critical modules: stack/channel preparation, fin patterning, inner spacer, channel release, contact. The successful demonstration of MoS2 NS with high performance and of the stacked NS modules further clarifies the value proposition in 2D materials for transistor scaling.",
author = "Chung, {Yun Yan} and Chou, {Bo Jhih} and Hsu, {Chen Feng} and Yun, {Wei Sheng} and Li, {Ming Yang} and Su, {Sheng Kai} and Liao, {Yu Tsung} and Lee, {Meng Chien} and Huang, {Guo Wei} and Liew, {San Lin} and Shen, {Yun Yang} and Chang, {Wen Hao} and Chen, {Chien Wei} and Kei, {Chi Chung} and Han Wang and {Philip Wong}, {H. S.} and Lee, {T. Y.} and Chien, {Chao Hsin} and Cheng, {Chao Ching} and Radu, {Iuliana P.}",
note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 2022 International Electron Devices Meeting, IEDM 2022 ; Conference date: 03-12-2022 Through 07-12-2022",
year = "2022",
doi = "10.1109/IEDM45625.2022.10019563",
language = "English",
series = "Technical Digest - International Electron Devices Meeting, IEDM",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "3451--3454",
booktitle = "2022 International Electron Devices Meeting, IEDM 2022",
address = "United States",
}