First demonstration of 40-nm channel length top-gate WS2 pFET using channel area-selective CVD growth directly on SiOx/Si substrate

Chao Ching Cheng, Yun Yan Chung, Uing Yang Li, Chao Ting Lin, Chi Feng Li, Jyun Hong Chen, Tung Yen Lai, Kai Shin Li, Jia Min Shieh, Sheng Kai Su, Hung Li Chiang, Tzu Chiang Chen, Lain Jong Li, H. S.Philip Wong, Chao-Hsin Chien*

*此作品的通信作者

研究成果: Conference contribution同行評審

30 引文 斯高帕斯(Scopus)

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Keyphrases

Engineering

Material Science