FinFET - A quasi-planar double-gate MOSFET

S. H. Tang; L. Chang; N. Lindert; Y. K. Choi; W. C. Lee; X. Huang; V. Subramanian; J. Bokor; T. J. King; Chen-Ming Hu

doi:10.1109/ISSCC.2001.912568

FinFET - A quasi-planar double-gate MOSFET

S. H. Tang^*, L. Chang, N. Lindert, Y. K. Choi, W. C. Lee, X. Huang, V. Subramanian, J. Bokor, T. J. King, Chen-Ming Hu

^*此作品的通信作者

國際半導體產業學院

研究成果: Conference article › 同行評審

107 引文斯高帕斯（Scopus）

摘要

A quasi-planar double-gate MOSFET, FinFET, was described. It is a device in which a thin, fin-shaped body is straddled by the gate, forming self-aligned channels that run along the sides of the fin. The FinFET is developed with special emphasis on process simplicity and compatibility with conventional planar CMOS technology. The FinFET width can be increased easily by drawing multiple fins in parallel.

原文	English
頁（從 - 到）	118-119+437
期刊	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
DOIs	https://doi.org/10.1109/ISSCC.2001.912568
出版狀態	Published - 1 1月 2001
事件	Digest of Technical Papers - IEEE International Solid-State Circuits Conference - 持續時間: 5 2月 2001 → 6 2月 2001

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10.1109/ISSCC.2001.912568

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title = "FinFET - A quasi-planar double-gate MOSFET",

abstract = "A quasi-planar double-gate MOSFET, FinFET, was described. It is a device in which a thin, fin-shaped body is straddled by the gate, forming self-aligned channels that run along the sides of the fin. The FinFET is developed with special emphasis on process simplicity and compatibility with conventional planar CMOS technology. The FinFET width can be increased easily by drawing multiple fins in parallel.",

author = "Tang, {S. H.} and L. Chang and N. Lindert and Choi, {Y. K.} and Lee, {W. C.} and X. Huang and V. Subramanian and J. Bokor and King, {T. J.} and Chen-Ming Hu",

year = "2001",

month = jan,

day = "1",

doi = "10.1109/ISSCC.2001.912568",

language = "English",

pages = "118--119+437",

journal = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

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publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference ; Conference date: 05-02-2001 Through 06-02-2001",

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TY - JOUR

T1 - FinFET - A quasi-planar double-gate MOSFET

AU - Tang, S. H.

AU - Chang, L.

AU - Lindert, N.

AU - Choi, Y. K.

AU - Lee, W. C.

AU - Huang, X.

AU - Subramanian, V.

AU - Bokor, J.

AU - King, T. J.

AU - Hu, Chen-Ming

PY - 2001/1/1

Y1 - 2001/1/1

N2 - A quasi-planar double-gate MOSFET, FinFET, was described. It is a device in which a thin, fin-shaped body is straddled by the gate, forming self-aligned channels that run along the sides of the fin. The FinFET is developed with special emphasis on process simplicity and compatibility with conventional planar CMOS technology. The FinFET width can be increased easily by drawing multiple fins in parallel.

AB - A quasi-planar double-gate MOSFET, FinFET, was described. It is a device in which a thin, fin-shaped body is straddled by the gate, forming self-aligned channels that run along the sides of the fin. The FinFET is developed with special emphasis on process simplicity and compatibility with conventional planar CMOS technology. The FinFET width can be increased easily by drawing multiple fins in parallel.

UR - http://www.scopus.com/inward/record.url?scp=0035060744&partnerID=8YFLogxK

U2 - 10.1109/ISSCC.2001.912568

DO - 10.1109/ISSCC.2001.912568

M3 - Conference article

AN - SCOPUS:0035060744

SN - 0193-6530

SP - 118-119+437

JO - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

JF - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

T2 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Y2 - 5 February 2001 through 6 February 2001

ER -

FinFET - A quasi-planar double-gate MOSFET

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