Fault-Tolerance Mechanism Analysis on NVDLA-Based Design Using Open Neural Network Compiler and Quantization Calibrator

Shu Ming Liu, Luba Tang, Ning Chi Huang, Der Yu Tsai, Ming Xue Yang, Kai Chiang Wu

研究成果: Conference contribution同行評審

7 引文 斯高帕斯(Scopus)

摘要

The NVIDIA Deep Learning Accelerator (NVDLA) provides free intellectual property licensing to IC chip vendors and researchers to build a chip that uses deep neural networks for inference applications. The Open Neural Network Compiler (ONNC) provides an extensible compiler, a quantization calibrator and optimization supports for running DNN models on NVDLA-based SoCs. Even with open-sourced NVDLA and ONNC, conducting the development of an AI chip still brings up many productivity issues in the mass production stage, such as SRAM MBIST (Memory Built-In Self Test) fail, scan-chain fail etc. When applying Fault-Tolerance Mechanism in error-Tolerant applications such as image classification by using the AI CNN model, this paper presents a light-weight Fault-Tolerance Mechanism to effectively enhance the robustness of NVDLA-based edge AI chip when encountering internal SRAM stuck fault. Our non-Accurate MAC calculation for the whole convolution computation leads to a very promising quality of results compared to the case when an exactly accurate convolution operation is used. The Fault-Tolerance Mechanism analysis and design described in this paper can also apply to the similar fixed-point deep learning accelerator design, and opens new opportunities for research as well as product development.

原文English
主出版物標題2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020
發行者Institute of Electrical and Electronics Engineers Inc.
頁面1-3
頁數3
ISBN(電子)9781728160832
DOIs
出版狀態Published - 10 8月 2020
事件2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020 - Hsinchu, Taiwan
持續時間: 10 8月 202013 8月 2020

出版系列

名字2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020

Conference

Conference2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020
國家/地區Taiwan
城市Hsinchu
期間10/08/2013/08/20

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