Fault detection and location in reconfigurable VLSI arrays

Kuo-Chen Wang*, Sy Yen Kuo

*此作品的通信作者

研究成果: Conference contribution同行評審

3 引文 斯高帕斯(Scopus)

摘要

A systematic and efficient fault diagnosis methodology in reconfigurable VLSI array architectures is presented. This methodology utilizes the output data path independence of subsets of processing elements (PEs) based on the topology of the arrays. The 'divide and conquer' technique is applied to reduce testing complexity and enhances the controllability and observability of arrays. An array under test is divided into several nonoverlapping parallel partitions. Those PEs in the same partition can be diagnosed simultaneously. The problem to find parallel partitions is shown equivalent to a generalized Eight Queens problem. Three types of easily testable PEs are designed to illustrate this approach. The main contribution of this paper is a novel PE fault diagnosis approach which speeds up the testing by at least O(|V|1/2) for the arrays considered, where |V| is the number of PEs. This approach requires little or no hardware overhead depending on the types of architectures and can diagnose multiple PE faults.

原文English
主出版物標題IEEE Int Conf Comput Aided Des ICCAD 89 Dig Tech Pap
編輯 Anon
發行者Publ by IEEE
頁面234-237
頁數4
ISBN(列印)0818659866
DOIs
出版狀態Published - 1 12月 1989
事件IEEE International Conference on Computer-Aided Design (ICCAD-89): Digest of Technical Papers - Santa Clara, CA, USA
持續時間: 5 11月 19899 11月 1989

出版系列

名字IEEE Int Conf Comput Aided Des ICCAD 89 Dig Tech Pap

Conference

ConferenceIEEE International Conference on Computer-Aided Design (ICCAD-89): Digest of Technical Papers
城市Santa Clara, CA, USA
期間5/11/899/11/89

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