For the replacement of conventional harddisks by NAND EEPROMs, a very high density and a high programming speed are required. An increased density can be achieved by using multi-level memory cells. With the new method, using staircase programming pulses combined with a bit-by-bit verify, a very narrow threshold voltage distribution of 0.7V, necessary for 4-level or 2-bit operation, and a high programming speed of 300μs/page or 590ns/byte can be obtained.
|頁（從 - 到）||129-130|
|期刊||Digest of Technical Papers - Symposium on VLSI Technology|
|出版狀態||Published - 1 十二月 1995|
|事件||Proceedings of the 1995 Symposium on VLSI Technology - Kyoto, Jpn|
持續時間: 6 六月 1995 → 8 六月 1995