@inproceedings{b0d0bfec31bb4317a0c5e792807670cc,
title = "Exploiting Binary Equilibrium for Efficient LDPC Decoding in 3D NAND Flash",
abstract = "3D NAND flash is prone to bit errors due to severe charge leakage. Modern SSDs adopt LDPC for bit error management, but LDPC can incur a high read latency through iterative adjustment to the reference voltage. Bit scrambling helps reduce inter-cell interference, and with it, ones and zeros equally contribute to raw data. We observed that as bit errors develop, the 0-bit ratio in raw data deviates from 50%. Inspired by this property, we propose a method for fast adjustment to the reference voltage, involving a placement step and a fine-tuning step. Our method uses only a few hundreds of bytes of RAM but improves the average read latency upon existing methods by up to 24%.",
keywords = "Flash Reliability, LDPC, NAND Flash, Read Latency, Solid-State Disks",
author = "Hsu, {Hsiang Sen} and Chang, {Li Pin}",
note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 28th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2022 ; Conference date: 23-08-2022 Through 25-08-2022",
year = "2022",
doi = "10.1109/RTCSA55878.2022.00018",
language = "English",
series = "Proceedings - 2022 IEEE 28th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2022",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "113--119",
booktitle = "Proceedings - 2022 IEEE 28th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2022",
address = "美國",
}