Evaluation on board-level noise filter networks to suppress transient-induced latchup under system-level ESD test

Ming-Dou Ker*, Sheng Fu Hsu

*此作品的通信作者

    研究成果: Conference contribution同行評審

    1 引文 斯高帕斯(Scopus)

    摘要

    Different types of board-level noise filter networks are evaluated for their effectiveness to improve the immunity of CMOS ICs against transient-induced latchup (TLU) under system-level electrostatic discharge (ESD) test. By choosing proper components in each noise filter network, the TLU immunity of CMOS ICs can be greatly improved. All the experimental evaluations have been verified with the SCR test structures and the ring oscillator fabricated in a 0.25-μm CMOS technology. Some of such board-level solutions can be further integrated into the chip design to effectively improve TLU immunity of CMOS IC products.

    原文English
    主出版物標題2005 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2005
    頁數8
    出版狀態Published - 9月 2005
    事件2005 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2005 - Anaheim, CA, United States
    持續時間: 8 9月 200516 9月 2005

    出版系列

    名字Electrical Overstress/Electrostatic Discharge Symposium Proceedings
    ISSN(列印)0739-5159

    Conference

    Conference2005 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2005
    國家/地區United States
    城市Anaheim, CA
    期間8/09/0516/09/05

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