TY - GEN
T1 - Evaluation of In-Memory Logic Computation for Ferroelectric Capacitive Memory
AU - Chang, Hao Hsiang
AU - Huang, Po Tsang
AU - Su, Pin
N1 - Publisher Copyright:
© 2025 Japan Society of Applied Physics.
PY - 2025
Y1 - 2025
N2 - In this work, through careful device design and analysis for Ferroelectric Capacitive Memory (FCM) devices, the 1T1C FCM Write/Read operation and bitwise AND/NAND and OR/NOR logic computation are demonstrated and evaluated. Due to the non-destructive read characteristic, the 1T1C FCM is a promising candidate for future LiM to overcome the von Neumann bottleneck.
AB - In this work, through careful device design and analysis for Ferroelectric Capacitive Memory (FCM) devices, the 1T1C FCM Write/Read operation and bitwise AND/NAND and OR/NOR logic computation are demonstrated and evaluated. Due to the non-destructive read characteristic, the 1T1C FCM is a promising candidate for future LiM to overcome the von Neumann bottleneck.
UR - https://www.scopus.com/pages/publications/105013617316
U2 - 10.23919/SNW65111.2025.11097210
DO - 10.23919/SNW65111.2025.11097210
M3 - Conference contribution
AN - SCOPUS:105013617316
T3 - 2025 Silicon Nanoelectronics Workshop, SNW 2025
SP - 78
EP - 79
BT - 2025 Silicon Nanoelectronics Workshop, SNW 2025
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2025 Silicon Nanoelectronics Workshop, SNW 2025
Y2 - 8 June 2025 through 9 June 2025
ER -