Estimating the Process Variation Effects of Stacked Gate All Around Si Nanosheet CFETs Using Artificial Neural Network Modeling Framework

We for the first time report a novel machine learning (ML) approach to model the effects of varying process parameters on DC characteristics of stacked gate all around (GAA) Si nanosheet (NS) complementary-FETs (CFETs) using an artificial neural network (ANN) model. Process parameters that have predominant effects on device characteristics are considered and used as input features to the ANN model; and, their effects on DC characteristics are modeled. Major figures of merit (FoMs) are further extracted accurately from the transfer characteristics in much less computational time as compared to 3D device simulation. The performance of the ANN model is further evaluated using the coefficient of determination, R2-score, which is more than 96%. It shows that the ANN model successfully learned the information from the dataset; thus, the ANN model exhibits the competency in device modeling of emerging CFETs.