@inproceedings{5b86d6be4ca84b298ab57a1c5e99d052,
title = "ESD protection design for mixed-voltage I/O circuit with substrate-triggered technique in sub-quarter-micron CMOS process",
abstract = "A substrate-triggered technique is proposed to improve ESD protection efficiency of the stacked-NMOS device in the mixed-voltage I/O circuit. The substrate-triggered technique, can further lower the trigger voltage of the stacked-NMOS device to ensure effective ESD protection for the mixed-voltage I/O circuit. The proposed ESD protection circuit with the substrate-triggered technique for 2.5 V/3.3 V tolerant mixed-voltage I/O circuit has been fabricated and verified in a 0.25-μm salicided CMOS process. Experimental results have confirmed that the HBM ESD robustness of the mixed-voltage I/O circuit can be increased ∼ 65% by this substrate-triggered design.",
keywords = "CMOS process, CMOS technology, Circuits, Electrostatic discharge, MOS devices, MOSFETs, Power supplies, Protection, Robustness, Voltage",
author = "Ming-Dou Ker and Chuang, {Chien Hui} and Hsu, {Kuo Chun} and Lo, {Wen Yu}",
year = "2002",
month = jan,
day = "1",
doi = "10.1109/ISQED.2002.996768",
language = "English",
series = "Proceedings - International Symposium on Quality Electronic Design, ISQED",
publisher = "IEEE Computer Society",
pages = "331--336",
booktitle = "Proceedings of the 2002 3rd International Symposium on Quality Electronic Design, ISQED 2002",
address = "United States",
note = "3rd International Symposium on Quality Electronic Design, ISQED 2002 ; Conference date: 18-03-2002 Through 21-03-2002",
}