ESD protection design for CMOS RF integrated circuits

Ming-Dou Ker, Tung Yang Chen, Chyh Yih Chang

    研究成果: Conference contribution同行評審

    6 引文 斯高帕斯(Scopus)

    摘要

    ESD protection design for CMOS RF integrated circuits is proposed in this paper by using the stacked polysilicon diodes as the input ESD protection devices to reduce the total input capacitance and to avoid the noise coupling from the common substrate. The ESD level of the stacked polysilicon diodes on the I/O pad is restored by using the turn-on efficient power-rail ESD clamp circuit, which is constructed by substrate-triggered technique. This polysilicon diode is fully process-compatible to general sub-quarter-micron CMOS processes.

    原文English
    主出版物標題Electrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2001
    發行者ESD Association
    頁面344-352
    頁數9
    ISBN(電子)1585370398
    出版狀態Published - 11 9月 2001
    事件Electrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2001 - Portland, United States
    持續時間: 11 9月 200113 9月 2001

    出版系列

    名字Electrical Overstress/Electrostatic Discharge Symposium Proceedings
    2001-January
    ISSN(列印)0739-5159

    Conference

    ConferenceElectrical Overstress/Electrostatic Discharge Symposium Proceedings, EOS/ESD 2001
    國家/地區United States
    城市Portland
    期間11/09/0113/09/01

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