ESD protection design by using only 1×VDD low-voltage devices for mixed-voltage I/O buffers with 3×VDD input tolerance

Ming-Dou Ker*, Chang Tzu Wang

*此作品的通信作者

    研究成果: Paper同行評審

    7 引文 斯高帕斯(Scopus)

    摘要

    A new electrostatic discharge (ESD) protection design by using only 1×VDD low-voltage devices for mixed-voltage I/O buffer with 3×VDD input tolerance is proposed. A special ESD detection circuit has been proposed to improve ESD protection efficiency of ESD clamp device by substrate-triggered technique to achieve high ESD level. This design has been successfully verified in a 0.13-μm CMOS process to provide an excellent circuit solution for on-chip ESD protection in the mixed-voltage I/O buffers with 3×VDD input tolerance.

    原文English
    頁面287-290
    頁數4
    DOIs
    出版狀態Published - 1 12月 2006
    事件2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 - Hangzhou, China
    持續時間: 13 11月 200615 11月 2006

    Conference

    Conference2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006
    國家/地區China
    城市Hangzhou
    期間13/11/0615/11/06

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