A new electrostatic discharge (ESD) protection design by using only 1×VDD low-voltage devices for mixed-voltage I/O buffer with 3×VDD input tolerance is proposed. A special ESD detection circuit has been proposed to improve ESD protection efficiency of ESD clamp device by substrate-triggered technique to achieve high ESD level. This design has been successfully verified in a 0.13-μm CMOS process to provide an excellent circuit solution for on-chip ESD protection in the mixed-voltage I/O buffers with 3×VDD input tolerance.
|出版狀態||Published - 1 12月 2006|
|事件||2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 - Hangzhou, China|
持續時間: 13 11月 2006 → 15 11月 2006
|Conference||2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006|
|期間||13/11/06 → 15/11/06|