The second breakdown current (It2) and ESD level of NMOS devices and diodes with different ESD implantations for on-chip ESD protection were verified in a 0.18-μm salicide bulk CMOS technology. The significant improvement was observed when the NMOS is fabricated with boron or arsenic ESD implantations.
|出版狀態||Published - 13 7月 2001|
|事件||8th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2001) - Singapure, Singapore|
持續時間: 9 7月 2001 → 13 7月 2001
|Conference||8th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2001)|
|期間||9/07/01 → 13/07/01|