TY - GEN
T1 - ESD buses for whole-chip ESD protection
AU - Ker, Ming-Dou
AU - Chang, Hun Hsien
AU - Chen, Tung Yang
PY - 1999/1/1
Y1 - 1999/1/1
N2 - A novel whole-chip ESD (electrostatic discharge) protection design with multiple ESD buses has been proposed to solve the ESD protection issue in the CMOS IC which has more separated power pins. The ESD current in the CMOS IC is diverted into the ESD buses, therefore the ESD current is conducted by the ESD buses away from the internal circuits and quickly discharged through the ESD protection devices. By using the ESD buses, the CMOS IC with separated power pins can be safely protected against the ESD damages which is located in the internal circuits.
AB - A novel whole-chip ESD (electrostatic discharge) protection design with multiple ESD buses has been proposed to solve the ESD protection issue in the CMOS IC which has more separated power pins. The ESD current in the CMOS IC is diverted into the ESD buses, therefore the ESD current is conducted by the ESD buses away from the internal circuits and quickly discharged through the ESD protection devices. By using the ESD buses, the CMOS IC with separated power pins can be safely protected against the ESD damages which is located in the internal circuits.
UR - http://www.scopus.com/inward/record.url?scp=0347074395&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.1999.777949
DO - 10.1109/ISCAS.1999.777949
M3 - Conference contribution
AN - SCOPUS:0347074395
SN - 0780354729
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 545
EP - 548
BT - Proceedings - IEEE International Symposium on Circuits and Systems
PB - IEEE
T2 - Proceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99
Y2 - 30 May 1999 through 2 June 1999
ER -