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Energy-aware scheduling and simulation methodologies for parallel security processors with multiple voltage domains
Yung Chia Lin
,
Yi-Ping You
, Chung Wen Huang
, Jenq Kuen Lee
*
, Wei Kuan Shih
, Ting Ting Hwang
*
此作品的通信作者
資訊科學與工程研究所
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引文 斯高帕斯(Scopus)
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Keyphrases
Analytic Model
33%
Cryptographic Processor
33%
Distributed Systems
33%
Dynamic Voltage Scaling
100%
Energy Reduction
33%
Energy Requirement
33%
Energy Scheduling
100%
Energy Simulation
33%
Heterogeneous Systems
33%
Low Power Consumption
33%
Low Power Optimization
33%
Mainstream Technology
33%
Multi-voltage
100%
On-a-chip
33%
Performance Requirements
33%
Performance Simulation
33%
Power Gating
100%
Power-aware
33%
Prototype Experiment
33%
Resource Scheduling
33%
Scaling Power
33%
Scheduling Issues
33%
Scheduling Methodology
100%
Security Processor
100%
Significant Energy
33%
Simulation Methodology
100%
System Configuration
33%
Task Scheduling
33%
Transaction Level Model
33%
Voltage Domain
100%
Voltage Power
66%
Computer Science
Analytic Model
33%
Distributed System
33%
Dynamic Voltage Scaling
100%
Level Transaction
33%
Lower Energy Consumption
33%
Power Optimization
33%
System Configuration
33%
System on a Chip
33%
task-scheduling
33%