Electrical performance improvement in SiO2/HfSiO high-k gate stack for advanced low power device application

M. F. Wang*, Tuo-Hung Hou, K. L. Mai, P. S. Lim, L. G. Yao, Y. Jin, S. C. Chen, M. S. Liang, W. H. Wu, S. C. Ou, M. C. Chen, T. Y. Huang

*此作品的通信作者

研究成果: Conference contribution同行評審

3 引文 斯高帕斯(Scopus)

摘要

A study on the impacts of varying base oxide thickness, Si composition and nitridation on HfSiO to the overall high-k gate stack performance was carried out in details. Increasing base oxide thickness from 8A to 12A was found to reduce susceptibility of charge trapping within HfSiO layer and improve drive current. Also, increasing Si composition in HfSiO layer from 50% to 75% produced a higher drive current. However, this improvement was achieved at the expense of a higher gate leakage current. The HfSiO, when subjected to N2 plasma, forms HfSiON that exhibits excellent high-k dielectric properties with low EOT, low leakage current and high driving current [1][2]. With complete understanding on the contribution from each layer, a good high-k gate stack, based on HfSiON was fabricated. Leakage current was successfully reduced to three orders lower than the conventional SiO2.

原文English
主出版物標題2004 International Conference on Integrated Circuit Design and Technology, ICICDT
頁面283-286
頁數4
DOIs
出版狀態Published - 2004
事件2004 International Conference on Integrated Circuit Design and Technology, ICICDT - Austin, TX, United States
持續時間: 17 5月 200420 5月 2004

出版系列

名字2004 International Conference on Integrated Circuit Design and Technology, ICICDT

Conference

Conference2004 International Conference on Integrated Circuit Design and Technology, ICICDT
國家/地區United States
城市Austin, TX
期間17/05/0420/05/04

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