摘要
A high-performance gate-all-around (GAA) poly-Si nanowire (NW) SONOS-type memory thin-film transistor (TFT) is presented. The presence of the corners of the GAA structure resulted in the program speed and memory window of this device being superior to those of a planar poly-Si TFT device. When erasing, planar devices exhibit a threshold-voltage shift resulting from gate injection; the GAA device was immune to this behavior. The presence of a nonuniform electric field in the channel region during programming and erasing was confirmed through simulation. The device also exhibited superior endurance and data-retention behavior.
| 原文 | English |
|---|---|
| 文章編號 | 5406072 |
| 頁（從 - 到） | 216-218 |
| 頁數 | 3 |
| 期刊 | IEEE Electron Device Letters |
| 卷 | 31 |
| 發行號 | 3 |
| DOIs | |
| 出版狀態 | Published - 1 3月 2010 |