Efficient designs of multiported memory on FPGA

Keyphrases

• Block RAM 100%
• Clock Frequency 12%
• Critical Performance 12%
• Field Programmable Gate Arrays 100%
• Hierarchical Design 12%
• Memory Design 25%
• Multi-port Memory 100%
• Operating Frequency 25%
• Performance Factor 12%
• Proposed Design 25%
• Table-driven 12%

Computer Science

• Building-Blocks 33%
• Clock Frequency 33%
• Field Programmable Gate Arrays 100%
• Memory Design 66%
• Operating Frequency 66%
• Performance Factor 33%