Effect of process variation on 15-nm-gate stacked multichannel surrounding-gate field effect transistor

Ming Hung Han*, Hui Wen Cheng, Chih Hong Hwang, Yi-Ming Li

*此作品的通信作者

研究成果: Conference contribution同行評審

摘要

Stacked multichannel transistor architectures were proposed recently which possess very attractive electrical characteristics on low leakage current and high driving current per layout area. However, due to complex manufacturing process, the process variation effect is inevitable and whose impact is unknown. Therefore, this study investigates the impact of process variation on 15-nm-gate stacked multichannel transistors consisting of the gate length deviation, channel position variation, quadruple-shaped channel structure and elliptic gate oxide. Our preliminary result shows that the stacked multichannel devices have good immunity to the gate length deviation and channel spacing variations; however, they are sensitive to the gate coverage ratio and gate oxide thickness variations. This study provides an insight into the device characteristic variations, which may benefit the development of nanoscale stacked multichannel transistors and circuits.

原文American English
主出版物標題2009 9th IEEE Conference on Nanotechnology, IEEE NANO 2009
發行者IEEE
頁面222-225
頁數4
ISBN(列印)9789810836948
出版狀態Published - 26 7月 2009
事件2009 9th IEEE Conference on Nanotechnology, IEEE NANO 2009 - Genoa, Italy
持續時間: 26 7月 200930 7月 2009

出版系列

名字2009 9th IEEE Conference on Nanotechnology, IEEE NANO 2009

Conference

Conference2009 9th IEEE Conference on Nanotechnology, IEEE NANO 2009
國家/地區Italy
城市Genoa
期間26/07/0930/07/09

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