Effect of annealing on defect elimination for high mobility amorphous indium-zinc-tin-oxide thin-film transistor

Chur Shyang Fuh*, Po-Tsun Liu, Wei Hsun Huang, Simon M. Sze

*此作品的通信作者

研究成果: Article同行評審

73 引文 斯高帕斯(Scopus)

摘要

This letter studies the correlation of postannealing treatment on the electrical performance of amorphous In-Zn-Sn-O thin-film transistor (a-IZTO TFT). The 400 °C annealed a-IZTO TFT exhibits a superior performance with field-effect mobility of 39.6 cm2/Vs, threshold voltage (Vth) of -2.8 V, and subthreshold swing of 0.25 V/decade. Owing to the structural relaxation by 400 °C annealing, both trap states of a-IZTO film and the interface trap states at the a-IZTO/SiO2 interface decrease to 2.16 × 1017 cm-3 eV-1 and 4.38 × 1012 cm-2 eV-1, respectively. The positive bias stability of 400 °C annealed a-IZTO TFTs is also effectively improved with a Vth shift of 0.92 V.

原文English
文章編號6899612
頁(從 - 到)1103-1105
頁數3
期刊IEEE Electron Device Letters
35
發行號11
DOIs
出版狀態Published - 11月 2014

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