摘要
A model for dV/dt breakdown in power MOSFET's is proposed. This model allows quantitative analysis of dV/dt limitation in power MOSFET circuits. Experimental results show good agreement with theoretical predictions.
原文 | English |
---|---|
頁(從 - 到) | 1-2 |
頁數 | 2 |
期刊 | IEEE Electron Device Letters |
卷 | 4 |
發行號 | 1 |
DOIs | |
出版狀態 | Published - 1 1月 1983 |